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APPLE AND TSMC POISED TO BRING 2NM SILICON TO IPHONE 18, EXTENDING A DECADE OF MINIATURIZATION

AppleMagazine

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November 14, 2025

Apple is preparing to push its iPhone silicon roadmap into the 2-nanometer era with the iPhone 18 cycle, aligning with TSMC's next major process node and reinforcing the long pattern of annual gains in performance per watt.

APPLE AND TSMC POISED TO BRING 2NM SILICON TO IPHONE 18, EXTENDING A DECADE OF MINIATURIZATION

The plan builds on Apple's strategy of pairing custom CPU and GPU architectures with the foundry's most advanced manufacturing, using tighter transistor geometries to lift speed, reduce leakage, and extend battery life under sustained loads.

imageHOW 2NM FITS THE ROADMAP APPLE HAS FOLLOWED SINCE A11

Moving to 2nm continues a cadence that has defined Apple's mobile chips for years. The A11 Bionic in 2017 marked the jump to 10nm, followed by the A12 at 7nm, a refinement with the A13 on enhanced 7nm, a more substantial shift to 5nm with the A14, and an efficiency-focused 5nm refresh in the A15. Apple then migrated to TSMC’s 4nm class for the A16 before adopting first-generation 3nm for A17 Pro, which brought larger GPU blocks, hardware ray tracing, and higher transistor budgets while keeping thermals in check for thin phone enclosures. Each transition has been less about raw peak clocks and more about the composite metric that matters in handhelds: work done per joule, sustained performance within a small thermal envelope, and responsiveness under mixed CPU/GPU/Neural workloads.

At 2nm, the physics push further. Shrinking standard cell dimensions allows Apple to either pack more functional units into the same die area or hold die size roughly constant and return the density benefit as lower power. Recent generations show how Apple tends to do both in balance: add architectural features where they matter to the user experience, then spend the remainder of the node's efficiency dividend on battery life and sustained frame rates. The net effect, cycle after cycle, is that graphics pipelines grow more capable, machine-learning blocks gain headroom for larger context windows and multimodal models, and CPU cores raise single-threaded bursts without incurring thermal throttling in everyday use.

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