"With A Goal of 100 RISC-V Tape-Outs, 1-TOPS Is Poised To Become The World's Largest Student-led SoC Tape-Out Programme"

A new wave is building in India's chip design scene, and 1-TOPS is giving students a rare chance to create real, tape-out-ready RISC-V SoCs.

- DR.SATHYA GUPTA

What is the 1-TOPS programme? Can you explain the motivation behind the VLSI Society of India's launch of the 1-TOPS initiative?

The “1-TOPS: 1 Tape-Out Per Student” programme, a unique collaboration between the VLSI Society of India (VSI) and C-DAC, is designed to empower B.Tech and M.Tech students with invaluable industry-ready experience. Through this initiative, students will complete a full chip System-on-Chip (SoC) Tape-Out before graduation. With an ambitious goal of 100 RISC-V Tape-Outs, 1-TOPS is poised to become the world’s largest student-led SoC Tape-Out programme. Its core mission is to bridge the crucial gap between academia and industry, fostering a new generation of industry-aware and talented engineers for the chip design sector. Under the 1-TOPS programme, industry experts led student teams will develop RISC-V cores and SoCs, managing the entire process from initial specifications to final Tape-Out, all within a one-year time-frame. These SoCs will be designed and manufactured using advanced process nodes and industry-standard tools and methodologies.

The VLSI Society of India is very thankful to all semiconductor companies for their overwhelming support for the 1-TOPS programme.

Can you provide details on the programme and how students will benefit from it?