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Is India's FAB VISION On Track Despite RECENT SETBACKS?

Electronics For You

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June 2025

Paused, not derailed—experts see the Adani and Zoho exits as distinct but strategic, not setbacks. Rather than failure, they signal a pivot: India’s chip drive now hinges on design depth and delivering existing models.

- SHUBHA MITRA

Is India's FAB VISION On Track Despite RECENT SETBACKS?

On April 30, 2025, reports emerged that the Adani Group had paused discussions with Israel’s Tower Semiconductor regarding a much-anticipated $10 billion chip fabrication model in India. A day later, software major Zoho announced the suspension of its $700 million plan to enter chip manufacturing.

The Economic Times framed these exits as a “setback to Prime Minister Narendra Modi, who has for several years tried to lure companies in his pursuit to make India a global chip manufacturing hub.”

Yet the reasons diverged. Zoho founder Sridhar Vembu explained that, despite an extensive search, the company could not secure a suitable technology partner to navigate the complexities of chipmaking. Adani, on the other hand, cited uncertainty around domestic demand and doubts over the model’s viability.

The shelving of two high-profile, capital-intensive ventures raises critical questions. What do these exits mean for India’s semiconductor roadmap—particularly as the domestic market is projected to reach $64 billion by 2026, and Union Electronics and IT Minister Ashwini Vaishnaw maintains that ‘Made-in-India’ chips will debut by year-end? Do these developments point to structural gaps in India’s readiness for chip manufacturing? Are policy frameworks overly optimistic—or are such shifts part of a natural evolution shaped by global headwinds?

A timeline

On September 6, 2024, Adani Group partnered with Israel’s Tower Semiconductor to establish a $10 billion semiconductor fabrication plant in Taloja, near Mumbai, maharashtra. Approved by the Maharashtra state government, the project was to be developed in two phases; the first with a production capacity of 40,000 semiconductor wafers per month, followed by expansion to 80,000 wafers per month in the second phase.

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